As the miniaturization of semiconductor memory devices advances, the manufacturing variations of transistors are not ignorable. In the case of a mask ROM, an operating speed depends on a gate width of a cell transistor. Accordingly, in a case where a cell transistor having a small gate width is used, while the circuit area can be suppressed, the variation in the value of a current flowing in the cell transistor is large, and it is necessary to decrease the operating speed of the mask ROM. On the other hand, in a case where a cell transistor having a large gate width is used, while data can be read out at high speed due to a large value of the current flowing in the cell transistor, the circuit area is increased.
In other words, in order to increase the current of the cell transistor and decrease the manufacturing variation, while it is necessary to increase the gate width of the cell transistor, there is a problem of increasing the circuit area of the cell transistor in such a case.